Note: System needs to be power-cycled after CPLD upgrade for the new BIOS and CPLD to take effect.
1. Download and the extract the latest CPLD files from below link required for upgrade procedure
CSG1500 CPU CPLD V09
Versa_20220512-VDD09_vme.vme
https://versanetworks.box.com/s/sh0recz320npjtzw4gaunqq8s4gsl4yq
2. Copy below files to DUT into /var/tmp directory
3. Check the current CPLD version once before upgrading as shown below
vsm-vcsn0> show chassis cpld info cpu
CPU CPLD Registers
--------------------------------------
CPLD revision major (0x00) : dd
CPLD revision minor (0x01) : 07
Scratch pad reg (0x02) : 00
Reset control 1 (0x03) : 00
Reset reason (0x04) : a6
Reset control 2 (0x05) : 00
Misc reg (0x0A) : 10
System LED control 1 (0x0E) : 30
Interrupt status 1 (0x1A) : 20
Interrupt enable 1 (0x1B) : 00
Interrupt status 2 (0x1C) : 00
Interrupt enable 2 (0x1D) : 00
I2C mainboard eeprom ch (0x30) : 50
Watchdog Timer target (0x35) : f0
Watchdog Timer ev record (0x36) : 00
Watchdog Timer enable (0x37) : 01
Watchdog Timer count (0x38) : 0b
USB over current (0x3F) : 80
POST display (0x80) : 00
Board SKU and rev (0x81) : 12
Create month reg (0x82) : 09
Create year 1 reg (0x83) : 20
Create year 2 reg (0x84) : 19
CPU status 1 reg (0x9A) : 20
CPU status 2 reg (0x9B) : 00
4. Assign cpldupd and cpldutil binaries executable permission from /var/tmp directory
5. Stop Versa services with following command
6. Execute following command to upgrade the CPLD on the system
[admin@versa-flexvnf: ~] $ sudo ./cpldupd -u CPU_SKX Versa_20220512-VDD09_vme.vme
=== CPU_SKX Versa_20220512-VDD09_vme.vme ===
65 91 B5 5F 5F 5F 5F 31 32 2E 31 F1 63 47 44 69
61 6D 6F 6E 64 20 44 65 70 6C 6F 79 6D 65 6E 74
20 54 6F 6F 6C 20 33 2E 31 31 0A 43 52 45 41 54
Update CPLD code from memory buffer 0x7f4522d0a010, filesize=0xBC2D0
CFG.TCK_SETUP=0
CFG.TCK_HOLD=0
SIDEBAND BASE ADDRESS = 380000000000
LPC BASE ADDRESS = fc800000
-->
Diamond Deployment Tool 3.11
CREATION DATE: Thu May 12 13:54:04 2022
...
Expected CRC: 0x91B5
Calculated CRC: 0x91B5
Return: 0x00000000
<--
Function returned success
exec_result: 0
clock_counts: 3687770
spend_time=42s
[admin@versa-flexvnf: ~] $
7. Once Upgrade procedure is completed, powercycle the system (unplug the power cords, wait for 10 seconds and plug them back in)
8. Verify the CPLD version after powercycleing the system
vsm-vcsn0> show chassis cpld info cpu
CPU CPLD Registers
--------------------------------------
CPLD revision major (0x00) : dd
CPLD revision minor (0x01) : 09
Scratch pad reg (0x02) : 00
Reset control 1 (0x03) : 00
Reset reason (0x04) : 26
Reset control 2 (0x05) : 00
Misc reg (0x0A) : 10
System LED control 1 (0x0E) : 30
Interrupt status 1 (0x1A) : 20
Interrupt enable 1 (0x1B) : 00
Interrupt status 2 (0x1C) : 00
Interrupt enable 2 (0x1D) : 00
I2C mainboard eeprom ch (0x30) : 50
Watchdog Timer target (0x35) : f0
Watchdog Timer ev record (0x36) : 00
Watchdog Timer enable (0x37) : 01
Watchdog Timer count (0x38) : 1d
USB over current (0x3F) : 80
POST display (0x80) : 00
Board SKU and rev (0x81) : 12
Create month reg (0x82) : 09
Create year 1 reg (0x83) : 20
Create year 2 reg (0x84) : 19
CPU status 1 reg (0x9A) : 20
CPU status 2 reg (0x9B) : 00
vsm-vcsn0>
CPLD upgrade is DONE.